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v dss = 100v r ds(on) = 28.5m ? i d = 35a specifically designed for automotive applications, thi power mosfet utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. additional features of this design are a 175c junction operating temperature, fast switching speed and improved repetitive avalanche rating . these features com- bine to make this design an extremely efficient and reliable device for use in automotive applications and a wide variety of other applications. s d g description advanced process technology ultra low on-resistance 175c operating temperature fast switching repetitive avalanche allowed up to tjmax features d-pak IRFR540Z i-pak irfu540z IRFR540Z irfu540z absolute maximum ratings parameter units i d @ t c = 25c continuous drain current, v gs @ 10v (silicon limited) i d @ t c = 100c continuous drain current, v gs @ 10v (silicon limited) a i dm pulsed drain current p d @t c = 25c power dissipation w linear derating factor w/c v gs gate-to-source voltage v e as (thermally limited) single pulse avalanche energy mj e as (tested ) single pulse avalanche energy tested value i ar avalanche current a e ar repetitive avalanche energy mj t j operating junction and t stg storage temperature range c reflow soldering temperature, for 10 seconds mounting torque, 6-32 or m3 screw thermal resistance parameter typ. max. units r jc junction-to-case ??? 1.64 r ja junction-to-ambient (pcb mount) ??? 40 c/w r ja junction-to-ambient ??? 110 -55 to + 175 300 10 lbf in (1.1n m) 91 0.61 20 max. 35 25 140 75 39 see fig.12a, 12b, 15, 16 2014-8-22 1 www.kersemi.com
s d g el ectr i ca l ch aracter i st i cs @ t j = 2 5 c ( un l ess ot h erw i se spec ifi e d) parameter min. typ. max. units v (br)dss drain-to-source breakdown voltage 100 ??? ??? v ? v (br)dss / ? t j breakdown voltage temp. coefficient ??? 0.092 ??? v/c r ds(on) static drain-to-source on-resistance ??? 22.5 28.5 m ? v gs(th) gate threshold voltage 2.0 ??? 4.0 v gfs forward transconductance 28 ??? ??? s i dss drain-to-source leakage current ??? ??? 20 a ??? ??? 250 i gss gate-to-source forward leakage ??? ??? 200 na gate-to-source reverse leakage ??? ??? -200 q g total gate charge ??? 39 59 q gs gate-to-source charge ??? 11 ??? nc q gd gate-to-drain ("miller") charge ??? 12 ??? t d(on) turn-on delay time ??? 14 ??? t r rise time ??? 42 ??? t d(off) turn-off delay time ??? 43 ??? ns t f fall time ??? 34 ??? l d internal drain inductance ??? 4.5 ??? between lead, nh 6mm (0.25in.) l s internal source inductance ??? 7.5 ??? from package and center of die contact c iss input capacitance ??? 1690 ??? c oss output capacitance ??? 180 ??? c rss reverse transfer capacitance ??? 100 ??? pf c oss output capacitance ??? 720 ??? c oss output capacitance ??? 110 ??? c oss eff. effective output capacitance ??? 190 ??? source-drain ratin g s and characteristics parameter min. typ. max. units i s continuous source current ??? ??? 35 (body diode) a i sm pulsed source current ??? ??? 140 (body diode) v sd diode forward voltage ??? ??? 1.3 v t rr reverse recovery time ??? 32 48 ns q rr reverse recovery charge ??? 40 60 nc t on forward turn-on time intrinsic turn-on time is negligible (turn-on is dominated by ls+ld) v gs = 10v v dd = 50v i d = 21a r g = 13 ? t j = 25c, i s = 21a, v gs = 0v t j = 25c, i f = 21a, v dd = 50v di/dt = 100a/s conditions v gs = 0v, i d = 250a reference to 25c, i d = 1ma v gs = 10v, i d = 21a v ds = v gs , i d = 50a v ds = 100v, v gs = 0v v ds = 100v, v gs = 0v, t j = 125c mosfet symbol showing the integral reverse p-n junction diode. conditions v gs = 10v v gs = 0v v ds = 25v ? = 1.0mhz v gs = 0v, v ds = 1.0v, ? = 1.0mhz v gs = 0v, v ds = 80v, ? = 1.0mhz v gs = 0v, v ds = 0v to 80v v gs = 20v v gs = -20v v ds = 50v v ds = 25v, i d = 21a i d = 21a 2014-8-22 2 www.kersemi.com
fig 2. typical output characteristics fig 1. typical output characteristics fig 3. typical transfer characteristics fig 4. typical forward transconductance vs. drain current 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 60s pulse width tj = 25c 4.5v 2 3 4 5 6 7 8 v gs , gate-to-source voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( ) t j = 25c t j = 175c v ds = 25v 60s pulse width 0.1 1 10 100 v ds , drain-to-source voltage (v) 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) vgs top 15v 10v 8.0v 7.0v 6.0v 5.5v 5.0v bottom 4.5v 60s pulse width tj = 175c 4.5v 0 1020304050 i d ,drain-to-source current (a) 0 10 20 30 40 50 60 70 g f s , f o r w a r d t r a n s c o n d u c t a n c e ( s ) t j = 25c t j = 175c v ds = 10v 380s pulse width 2014-8-22 3 www.kersemi.com
fig 8. maximum safe operating area fig 6. typical gate charge vs. gate-to-source voltage fig 5. typical capacitance vs. drain-to-source voltage fig 7. typical source-drain diode forward voltage 1 10 100 v ds , drain-to-source voltage (v) 0 500 1000 1500 2000 2500 3000 c , c a p a c i t a n c e ( p f ) v gs = 0v, f = 1 mhz c iss = c gs + c gd , c ds shorted c rss = c gd c oss = c ds + c gd c oss c rss c iss 0 102030405060 q g total gate charge (nc) 0 4 8 12 16 20 v g s , g a t e - t o - s o u r c e v o l t a g e ( v ) v ds = 80v vds= 50v vds= 20v i d = 21a 0.2 0.4 0.6 0.8 1.0 1.2 1.4 v sd , source-to-drain voltage (v) 0.1 1.0 10.0 100.0 1000.0 i s d , r e v e r s e d r a i n c u r r e n t ( a ) t j = 25c t j = 175c v gs = 0v 0 1 10 100 1000 v ds , drain-tosource voltage (v) 0.1 1 10 100 1000 i d , d r a i n - t o - s o u r c e c u r r e n t ( a ) tc = 25c tj = 175c single pulse 1msec 10msec operation in this area limited by r ds (on) 100sec dc 2014-8-22 4 www.kersemi.com
fig 11. maximum effective transient thermal impedance, junction-to-case fig 9. maximum drain current vs. case temperature fig 10. normalized on-resistance vs. temperature 25 50 75 100 125 150 175 t c , casetemperature (c) 0 10 20 30 40 i d , d r a i n c u r r e n t ( a ) 1e-006 1e-005 0.0001 0.001 0.01 0.1 t 1 , rectangular pulse duration (sec) 0.001 0.01 0.1 1 10 t h e r m a l r e s p o n s e ( z t h j c ) 0.20 0.10 d = 0.50 0.02 0.01 0.05 single pulse ( thermal response ) notes: 1. duty factor d = t1/t2 2. peak tj = p dm x zthjc + tc ri (c/w) i (sec) 2.626 0.000052 0.6611 0.001297 0.7154 0.01832 j j 1 1 2 2 3 3 r 1 r 1 r 2 r 2 r 3 r 3 c ci i / ri ci= i / ri -60 -40 -20 0 20 40 60 80 100 120 140 160 180 t j , junction temperature (c) 0.5 1.0 1.5 2.0 2.5 r d s ( o n ) , d r a i n - t o - s o u r c e o n r e s i s t a n c e ( n o r m a l i z e d ) i d = 21a v gs = 10v 2014-8-22 5 www.kersemi.com
q g q gs q gd v g charge fig 13b. gate charge test circuit fig 13a. basic gate charge waveform fig 12c. maximum avalanche energy vs. drain current fig 12b. unclamped inductive waveforms fig 12a. unclamped inductive test circuit t p v (br)dss i as fig 14. threshold voltage vs. temperature r g i as 0.01 ? t p d.u.t l v ds + - v dd driver a 15v 20v v gs 1k vcc dut 0 l 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 40 80 120 160 e a s , s i n g l e p u l s e a v a l a n c h e e n e r g y ( m j ) i d top 6.5a 9.4a bottom 21a -75 -50 -25 0 25 50 75 100 125 150 175 t j , temperature ( c ) 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 v g s ( t h ) g a t e t h r e s h o l d v o l t a g e ( v ) i d = 1.0ma id = 250a i d = 50a 2014-8-22 6 www.kersemi.com
fig 15. typical avalanche current vs.pulsewidth fig 16. maximum avalanche energy vs. temperature notes on repetitive avalanche curves , figures 15, 16: (for further info, see an-1005 at www.irf.com) 1. avalanche failures assumption: purely a thermal phenomenon and failure occurs at a temperature far in excess of t jmax . this is validated for every part type. 2. safe operation in avalanche is allowed as long ast jmax is not exceeded. 3. equation below based on circuit and waveforms shown in figures 12a, 12b. 4. p d (ave) = average power dissipation per single avalanche pulse. 5. bv = rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. i av = allowable avalanche current. 7. ? t = allowable rise in junction temperature, not to exceed t jmax (assumed as 25c in figure 15, 16). t av = average time in avalanche. d = duty cycle in avalanche = t av f z thjc (d, t av ) = transient thermal resistance, see figure 11) p d (ave) = 1/2 ( 1.3bvi av ) = t/ z thjc i av = 2 t/ [1.3bvz th ] e as (ar) = p d (ave) t av 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 tav (sec) 0.1 1 10 100 a v a l a n c h e c u r r e n t ( a ) 0.05 duty cycle = single pulse 0.10 allowed avalanche current vs avalanche pulsewidth, tav assuming ? tj = 25c due to avalanche losses 0.01 25 50 75 100 125 150 175 starting t j , junction temperature (c) 0 10 20 30 40 e a r , a v a l a n c h e e n e r g y ( m j ) top single pulse bottom 1% duty cycle i d = 21a 2014-8-22 7 www.kersemi.com
fig 17.
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v ds 90% 10% v gs t d(on) t r t d(off) t f &' 1 (
# 0.1 % + - fig 18a. switching time test circuit fig 18b. switching time waveforms 2014-8-22 8 www.kersemi.com

int ernat ional example: note: "p" in assembly line pos ition indicates "l ead-f ree" as s embled on ww 16, 1999 in the assembly line "a" t his is an irfr120 wi t h as s e mb l y lot code 1234 assembly lot code international rect ifier logo 12 product (optional) p = designates lead-free a = assembly site code dat e code year 9 = 1999 week 16 34 part number part number week 16 line a dat e code year 9 = 1999 34 or irfr120 p916a 916a irfr120 rect ifier as s e mb l y lot code logo 12

2014-8-22 9 www.kersemi.com

56 78 78 919a lot code as s e mb l y logo international rectifier irf u120 example: note: "p" in as s embly line pos ition indicates "l ead-f ree" as s emble d on ww 19, 1999 in the assembly line "a" t his is an irfu120 lot code 5678 wit h as s e mb l y assembly lot code rectifier logo international irfu120 56 product (optional) p = designates lead-free a = as s e mb l y s i t e code year 9 = 1999 dat e code we e k 19 part number part number we e k 1 9 dat e code year 9 = 1999 line a or 2014-8-22 10 www.kersemi.com

tr 16.3 ( .641 ) 15.7 ( .619 ) 8.1 ( .318 ) 7.9 ( .312 ) 12.1 ( .476 ) 11.9 ( .469 ) feed direction feed direction 16.3 ( .641 ) 15.7 ( .619 ) trr trl notes : 1. controlling dimension : millimeter. 2. all dimensions are shown in millimeters ( inches ). 3. outline conforms to eia-481 & eia-541. notes : 1. outline conforms to eia-481. 16 mm 13 inch repetitive rating; pulse width limited by max. junction temperature. (see fig. 11). limited by t jmax , starting t j = 25c, l = 0.17mh r g = 25 ? , i as = 21a, v gs =10v. part not recommended for use above this value. pulse width 1.0ms; duty cycle 2%. c oss eff. is a fixed capacitance that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . limited by t jmax , see fig.12a, 12b, 15, 16 for typical repetitive avalanche performance. this value determined from sample failure population. 100% tested to this value in production. when mounted on 1" square pcb (fr-4 or g-10 material) . )
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